Proceedings of the 2019 International Conference on Wireless Communication, Network and Multimedia Engineering (WCNME 2019)

The Impact of Dead-time on Synchronous Rectification Circuit Efficiency

Authors
Hanshen Wang, Jian Guo, Jingli Gong, Jianfei Chen, Sheng Zhang
Corresponding Author
Sheng Zhang
Available Online June 2019.
DOI
10.2991/wcnme-19.2019.29How to use a DOI?
Keywords
synchronous rectifier; dead-time; efficiency; ringing effect
Abstract

In the synchronous rectification circuit, due to the junction capacitance of MOSFETs and other factors, an on-and-off delay problem exists, which further leads to phenomenon of circuit short, circuit heating and inefficiencies. These phenomenon can be reduced significantly by setting an appropriate dead-time to prevent direct conduction from the opposite MOSFETs. However, the current determination of dead-time is investigated mainly empirically and unreasonable setting of dead-time will affect the work of circuit. This paper will discuss the relationship between dead-time and the efficiency of the synchronous rectifier buck circuit ,it will draw the conclusion that the increased dead-time can eliminate the self-excited ringing effect and improve the working efficiency of the power supply at low voltage when the output amplitude requirement is satisfied .The experimental verification is carried out with a synchronous rectification Buck circuit with an operating frequency of 20kHz, an input voltage of 20 volts, an output range of 0 to 19 volts and a variable dead-time. The conclusions of this paper are of great significance to the design of power supply circuit, improving its working efficiency and reliability.

Copyright
© 2019, the Authors. Published by Atlantis Press.
Open Access
This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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Volume Title
Proceedings of the 2019 International Conference on Wireless Communication, Network and Multimedia Engineering (WCNME 2019)
Series
Advances in Computer Science Research
Publication Date
June 2019
ISBN
978-94-6252-737-9
ISSN
2352-538X
DOI
10.2991/wcnme-19.2019.29How to use a DOI?
Copyright
© 2019, the Authors. Published by Atlantis Press.
Open Access
This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

Cite this article

TY  - CONF
AU  - Hanshen Wang
AU  - Jian Guo
AU  - Jingli Gong
AU  - Jianfei Chen
AU  - Sheng Zhang
PY  - 2019/06
DA  - 2019/06
TI  - The Impact of Dead-time on Synchronous Rectification Circuit Efficiency
BT  - Proceedings of the 2019 International Conference on Wireless Communication, Network and Multimedia Engineering (WCNME 2019)
PB  - Atlantis Press
SP  - 125
EP  - 128
SN  - 2352-538X
UR  - https://doi.org/10.2991/wcnme-19.2019.29
DO  - 10.2991/wcnme-19.2019.29
ID  - Wang2019/06
ER  -