A 40nm CMOS Ultra-Wideband Low Noise Amplifier Design
Authors
Jiaqian Wu, Zhangfa Liu
Corresponding Author
Zhangfa Liu
Available Online June 2019.
- DOI
- 10.2991/wcnme-19.2019.9How to use a DOI?
- Keywords
- CMOS, feedback; flatness; Low Noise Amplifier(LNA); Noise Figure(NF); bandwidth
- Abstract
An ultra-wideband low noise amplifier(LNA) based on the cascode configuration with resistive feedback is presented in this paper. A shunt-shunt feedback resistor and a pre-π matching network is employed to achieve wideband input impedance matching, and to enhance gain response and reduce noise for using a post-cascode inductor LP. In this paper, the SMIC 40nm CMOS process is used. The circuit simulation results show that S11 is lower than -10dB, and the gain S21 is around 10±2dB,and the NF is lower than 4.5dB in the 3.5-31-GHz frequency range.
- Copyright
- © 2019, the Authors. Published by Atlantis Press.
- Open Access
- This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).
Cite this article
TY - CONF AU - Jiaqian Wu AU - Zhangfa Liu PY - 2019/06 DA - 2019/06 TI - A 40nm CMOS Ultra-Wideband Low Noise Amplifier Design BT - Proceedings of the 2019 International Conference on Wireless Communication, Network and Multimedia Engineering (WCNME 2019) PB - Atlantis Press SP - 36 EP - 40 SN - 2352-538X UR - https://doi.org/10.2991/wcnme-19.2019.9 DO - 10.2991/wcnme-19.2019.9 ID - Wu2019/06 ER -