Proceedings of the 2nd International Conference on Internet, Education and Information Technology (IEIT 2022)

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Hardware Implementation of SM9 Fast Algorithm Based on FPGA

Authors
Shuai Jing1, XiaoTing Yang1, YeJi Feng1, XiaoDong Liu1, FuQing Hao1, ZiHeng Yang1, *
1School of Electronic Engineering, Heilongjiang University, Nangang District, Harbin City, Heilongjiang Province, China
*Corresponding author. Email: yzh@hlju.edu.cn
Corresponding Author
ZiHeng Yang
Available Online 27 December 2022.
DOI
10.2991/978-94-6463-058-9_125How to use a DOI?
Keywords
FPGA; Dot multiplication; SM9; Identification encryption algorithm
ABSTRACT

SM9 algorithm plays a very important role in the field of information security in our country, it can effectively solve the problem of certificate management of PKI. The dot multiplication operation in the SM9 algorithm takes up a lot of computing time, which seriously affects the operation efficiency. The traditional modular multiplication algorithm uses a simple shift and addition method. To shorten the time consumed by the operation, this paper proposes an improved modular multiplication algorithm that supports a four-stage pipeline. In addition, this paper also designs and improves algorithms such as point addition, point doubling, and point multiplication. Through FPGA simulation and verification, it only takes 0.848ms to realize one point multiplication operation, and the occupied resources are 18526 look-up tables (LUTs) and 13982 flip-flops (FFs). This research has great significance for the development of SM9, making it have wider application value.

Copyright
© 2023 The Author(s)
Open Access
Open Access This chapter is licensed under the terms of the Creative Commons Attribution-NonCommercial 4.0 International License (http://creativecommons.org/licenses/by-nc/4.0/), which permits any noncommercial use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license and indicate if changes were made.

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Volume Title
Proceedings of the 2nd International Conference on Internet, Education and Information Technology (IEIT 2022)
Series
Advances in Computer Science Research
Publication Date
27 December 2022
ISBN
978-94-6463-058-9
ISSN
2352-538X
DOI
10.2991/978-94-6463-058-9_125How to use a DOI?
Copyright
© 2023 The Author(s)
Open Access
Open Access This chapter is licensed under the terms of the Creative Commons Attribution-NonCommercial 4.0 International License (http://creativecommons.org/licenses/by-nc/4.0/), which permits any noncommercial use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license and indicate if changes were made.

Cite this article

risenwbib
TY  - CONF
AU  - Shuai Jing
AU  - XiaoTing Yang
AU  - YeJi Feng
AU  - XiaoDong Liu
AU  - FuQing Hao
AU  - ZiHeng Yang
PY  - 2022
DA  - 2022/12/27
TI  - Hardware Implementation of SM9 Fast Algorithm Based on FPGA
BT  - Proceedings of the 2nd International Conference on Internet, Education and Information Technology (IEIT 2022)
PB  - Atlantis Press
SP  - 797
EP  - 803
SN  - 2352-538X
UR  - https://doi.org/10.2991/978-94-6463-058-9_125
DO  - 10.2991/978-94-6463-058-9_125
ID  - Jing2022
ER  -