Run-time Accelerate Channel for Communication-Aware Network-on-Chip

DOI

10.2991/iceeim-14.2014.76How to use a DOI?

Keywords

Network-on-Chip (NoC), run-time accelerate channel (RAC), application locality, end-to-end communication

Abstract

Network-on-Chip (NoC) is a major communication architecture in multi-core system. Reducing the average delay of network communication is a crucial problem to improve system performance. In this paper, a run-time acceleration mechanism is proposed to reduce the latency of busy traffic in a network. We first predict the pair-wise nodes who communicate with each other frequently based on application’s locality. Then we propose a run-time acceleration mechanism which combines the packet-switched and the virtual-circuit switching. It can shorten the router pipeline of busy traffic we predicted, thereby achieves the goal of reducing network’s average latency. We evaluate the proposed scheme on a 64-core CMP with a mesh topology, using a suite of applications from PARSEC. Our proposed scheme reduces network’s average latency by 17.4% compared to a traditional packet-switched NoC.

Copyright

© 2014, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Tianpeng Ai
AU  - Tongsen Hu
AU  - Tianzhou Chen
PY  - 2014/04
DA  - 2014/04
TI  - Run-time Accelerate Channel for Communication-Aware Network-on-Chip
BT  - Proceedings of the 2014 International Conference on e-Education, e-Business and Information Management
PB  - Atlantis Press
SP  - 262
EP  - 265
SN  - 1951-6851
UR  - https://doi.org/10.2991/iceeim-14.2014.76
DO  - 10.2991/iceeim-14.2014.76
ID  - Ai2014/04
ER  -