The Design and Implementation of FFT Algorithm Based on The Xilinx FPGA IP Core

DOI

10.2991/iccasm.2012.220How to use a DOI?

Keywords

FFT algorithm module, Xilinx IP core, Spartan - 3A DSP, Fixed-point compression

Abstract

This paper introduces a kind of FFT algorithm design and realization based on the Xilinx IP core . On the analysis of FFT algorithm, Rely on Xilinx Spartan -3A DSP FPGA series as platform, by calling FFT IP core, validating the feasibility and reliability in FFT algorithm medium or lower end FPGA.

Copyright

© 2012, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Jin Zhu
AU  - Jun Luo
AU  - Shuang Zhang
PY  - 2012/08
DA  - 2012/08
TI  - The Design and Implementation of FFT Algorithm Based on The Xilinx FPGA IP Core
BT  - Proceedings of the 2012 International Conference on Computer Application and System Modeling (ICCASM 2012)
PB  - Atlantis Press
SP  - 863
EP  - 865
SN  - 1951-6851
UR  - https://doi.org/10.2991/iccasm.2012.220
DO  - 10.2991/iccasm.2012.220
ID  - Zhu2012/08
ER  -