The Design and Implementation of FIR Filter Based on Improved DA Algorithm

DOI

10.2991/cmfe-15.2015.193How to use a DOI?

Keywords

FIR filter; look-up table; DA algorithm; FPGA; FDA Tool

Abstract

FIR filter is widely used in the fields of signal processing with high fidelity. In the design of FIR filter the traditional algorithm such as serial DA algorithm, parallel DA algorithm and combined series and parallel DA algorithm are all not so suitable, which has lots of shortcomings. In this design, we improve the DA algorithm and uses the 4-BAAT method which optimizes the structure of LUT(look-up table) to realize the FIR filter. The process of FIR simple tap coefficients is achieved by the operation of shifting and reversing of symbol bit, which can pick up the speed and save the logic resources. This design adopts the Verilog HDL language, using FDA Tool to determine and quantify the coefficients with the given filter parameters. Then it uses Quartus II8.0 to integrate and wire, and Modelsim to simulate and verify. Compared with the filter achieved by standard DA algorithm, this filter reduces complexity, saves logic resources and picks up the speed besides it has the advantages of good reconfiguration, simple hardware structure and high real-time.

Copyright

© 2015, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Jun Yang
AU  - Hongye Li
AU  - Zongjing Li
AU  - Qing Han
PY  - 2015/07
DA  - 2015/07
TI  - The Design and Implementation of FIR Filter Based on Improved DA Algorithm
BT  - Proceedings of the International Conference on Chemical, Material and Food Engineering
PB  - Atlantis Press
SP  - 820
EP  - 823
SN  - 2352-5401
UR  - https://doi.org/10.2991/cmfe-15.2015.193
DO  - 10.2991/cmfe-15.2015.193
ID  - Yang2015/07
ER  -