Proceedings of the 2019 International Conference on Wireless Communication, Network and Multimedia Engineering (WCNME 2019)

Design of Intelligent Digital Clock Based on FPGA

Authors
Zefan Ge, Yizhun Peng, Yuhan Zhang, Shiqian Zhang, Zhou Yang
Corresponding Author
Yizhun Peng
Available Online June 2019.
DOI
10.2991/wcnme-19.2019.47How to use a DOI?
Keywords
ALTERAEP4CE6E22C8N; FPGA; multi-function digital clock; hardware description language
Abstract

This paper takes ALTERA EP4CE6E22C8N as the control center, and designs a multifunctional digital clock system based on FPGA, which consists of clock module, timing module, power module, keyboard control module, data decoding module and digital tube display module HDL designs text input for the system logic description language. In the QUARTUSII tool software environment, based on the top-down design idea of FPGA, hierarchical modeling of digital clock circuit is completed by text file input, and the digital clock based on FPGA is constructed jointly by each basic module. After the program is compiled and simulated, download it on the core board to review. This system can realize the function of displaying time in hour, minutes and seconds in turn, calibrating with keys, timing on the hour and alarm clock.

Copyright
© 2019, the Authors. Published by Atlantis Press.
Open Access
This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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Volume Title
Proceedings of the 2019 International Conference on Wireless Communication, Network and Multimedia Engineering (WCNME 2019)
Series
Advances in Computer Science Research
Publication Date
June 2019
ISBN
978-94-6252-737-9
ISSN
2352-538X
DOI
10.2991/wcnme-19.2019.47How to use a DOI?
Copyright
© 2019, the Authors. Published by Atlantis Press.
Open Access
This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

Cite this article

TY  - CONF
AU  - Zefan Ge
AU  - Yizhun Peng
AU  - Yuhan Zhang
AU  - Shiqian Zhang
AU  - Zhou Yang
PY  - 2019/06
DA  - 2019/06
TI  - Design of Intelligent Digital Clock Based on FPGA
BT  - Proceedings of the 2019 International Conference on Wireless Communication, Network and Multimedia Engineering (WCNME 2019)
PB  - Atlantis Press
SP  - 198
EP  - 200
SN  - 2352-538X
UR  - https://doi.org/10.2991/wcnme-19.2019.47
DO  - 10.2991/wcnme-19.2019.47
ID  - Ge2019/06
ER  -