L/S-Band 0.18 æm CMOS 6-bit Digital Phase Design

DOI

10.2991/mcei-16.2016.77How to use a DOI?

Keywords

0.18æm CMOS process; Phased array ladar; T/R module;Phase shifter

Abstract

A L/S band 6-bit phase shifter for phased array radar system is designed based on SMIC 0.18um standard CMOS process in this paper. The reasonable parameters calculation and optimization are carried out, the circuits layout design is completed, and the phase RMS error of phase shifter is less than 2 ø, the insertion loss is less than 2dB, and the layout size is 2.87ž1.2mm2.A L/S band 6-bit phase shifter for phased array radar system is designed based on SMIC 0.18um standard CMOS process in this paper. The reasonable parameters calculation and optimization are carried out, the circuits layout design is completed, and the phase RMS error of phase shifter is less than 2 ø, the insertion loss is less than 2dB, and the layout size is 2.87ž1.2mm2.

Copyright

© 2017, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Xinyu Sheng
AU  - Zhangfa Liu
PY  - 2016/12
DA  - 2016/12
TI  - L/S-Band 0.18 æm CMOS 6-bit Digital Phase Design
BT  - Proceedings of the 2016 6th International Conference on Mechatronics, Computer and Education Informationization (MCEI 2016)
PB  - Atlantis Press
SP  - 369
EP  - 374
SN  - 1951-6851
UR  - https://doi.org/10.2991/mcei-16.2016.77
DO  - 10.2991/mcei-16.2016.77
ID  - Sheng2016/12
ER  -