Design and Implementation of USB3.0 Data Transmission System based on FPGA

DOI

10.2991/iccia-19.2019.13How to use a DOI?

Keywords

FPGA; USB3.0; DDR3; Data Transmission.

Abstract

Aiming at the problems of slow transmission speed and high hardware resources in the traditional USB data transmission system, a USB3.0 data transmission system based on FPGA is designed. The system uses FPGA as the core control chip, and EZ-USB FX3 realizes high-speed data transmission of USB3.0 synchronous Slave FIFO mode through GPIF II general programmable interface. The design scheme has high portability and expandability, can be widely applied to different communication projects. System performance analysis and test results show that the average transmission rate of the system can reach 328MB/S, and the logical resource occupancy rate is less than 1%, realizing high-speed data transmission.

Copyright

© 2019, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Fenxian Tian
AU  - Juan Li
AU  - Xinxin Sun
AU  - Jun Yang
PY  - 2019/07
DA  - 2019/07
TI  - Design and Implementation of USB3.0 Data Transmission System based on FPGA
BT  - Proceedings of the 3rd International Conference on Computer Engineering, Information Science & Application Technology (ICCIA 2019)
PB  - Atlantis Press
SP  - 88
EP  - 94
SN  - 2352-538X
UR  - https://doi.org/10.2991/iccia-19.2019.13
DO  - 10.2991/iccia-19.2019.13
ID  - Tian2019/07
ER  -