Proceedings of the International Conference on Advanced Materials, Manufacturing and Sustainable Development (ICAMMSD 2024)

Power Optimized Carry Select Adder Using Reversible Logic Gates

Authors
D. Rohini1, *, M. Harsha Vardhan Reddy2, G. Kishor3
1Assistant Professor, Dept. of ECE, G. Pulla Reddy Engineering College, Kurnool, A.P, India
2Associate Professor, Dept. of EEE, G. Pulla Reddy Engineering College, Kurnool, A.P, India
3Professor, Department of EEE, G. Pulla Reddy Engineering College, Kurnool, A.P, India
*Corresponding author. Email: rohini.damireddy@gmail.com
Corresponding Author
D. Rohini
Available Online 17 March 2025.
DOI
10.2991/978-94-6463-662-8_63How to use a DOI?
Keywords
Reversible gate; Reversible; Carry select Adder; Adder; HDL VERILOG
Abstract

Reversible logic is playing an important role for low power computations. In today’s trend it is essential to optimize the power for portable devices which can be achieved through reversible logic computation. The low power computations can be performed using Reversible Logic Gates (RLG) which forms the fundamental blocks of the digital logic circuits. One of the important metric’s in the integrated circuit design is Power dissipation. The Digital circuits constructed using irreversible conventional logic gates dissipates more power when compared to the circuits with Reversible Logic Gates. Adders are the fundamental components which performs the basic addition operation in many complex calculations. Among various adders available Carry select Adder being the fastest adders used to perform the basic arithmetic Addition operation in many data processing processors. Thus it is essential to design a power efficient Carry select Adder(CSA) in power constraint and high speed design applications. In this paper both conventional and reversible CSA is modelled using Verilog HDL and it is synthesized by using XILINX VIVADO EDA tool.

Copyright
© 2025 The Author(s)
Open Access
Open Access This chapter is licensed under the terms of the Creative Commons Attribution-NonCommercial 4.0 International License (http://creativecommons.org/licenses/by-nc/4.0/), which permits any noncommercial use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license and indicate if changes were made.

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Volume Title
Proceedings of the International Conference on Advanced Materials, Manufacturing and Sustainable Development (ICAMMSD 2024)
Series
Advances in Engineering Research
Publication Date
17 March 2025
ISBN
978-94-6463-662-8
ISSN
2352-5401
DOI
10.2991/978-94-6463-662-8_63How to use a DOI?
Copyright
© 2025 The Author(s)
Open Access
Open Access This chapter is licensed under the terms of the Creative Commons Attribution-NonCommercial 4.0 International License (http://creativecommons.org/licenses/by-nc/4.0/), which permits any noncommercial use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license and indicate if changes were made.

Cite this article

TY  - CONF
AU  - D. Rohini
AU  - M. Harsha Vardhan Reddy
AU  - G. Kishor
PY  - 2025
DA  - 2025/03/17
TI  - Power Optimized Carry Select Adder Using Reversible Logic Gates
BT  - Proceedings of the International Conference on Advanced Materials, Manufacturing and Sustainable Development (ICAMMSD 2024)
PB  - Atlantis Press
SP  - 791
EP  - 801
SN  - 2352-5401
UR  - https://doi.org/10.2991/978-94-6463-662-8_63
DO  - 10.2991/978-94-6463-662-8_63
ID  - Rohini2025
ER  -