The research and design of 5.8GHz RF front-end receiver based on double balanced resistive mixer

DOI

10.2991/icamcs-16.2016.176How to use a DOI?

Keywords

Double balance Resistance, Mixing, 5.8GHzRadio frequency, Front-ends receiver

Abstract

This paper discussed the design of a 0.18 m CMOS process 5.8GHz RF front-end circuit, and the simulation and experiment were carried out. The main circuit design are low noise amplifier and mixer, the noise amplifier is overlay architecture, and using dual output mode single input / transformer coupling; The mixer is double balanced resistive architecture, and the FET are used as local oscillator input, so this kind of design has the advantages of no need of the level of the impedance matching and high performance. Experimental results show that: When the intermediate frequency is 2 GHz, the noise index is 2.7 dB, the conversion gain is 6.3 dB, and the input of the three order breaking point is 11 dBm. 1.2 V supply voltage under the consumption of energy is 4.3 mW, and the chip area is 1.1 x 0.66mm2. The design of this chip can be widely used in the microwave electronic toll collection system.

Copyright

© 2016, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Meiyi Liu
PY  - 2016/06
DA  - 2016/06
TI  - The research and design of 5.8GHz RF front-end receiver based on double balanced resistive mixer
BT  - Proceedings of the 2016 5th International Conference on Advanced Materials and Computer Science
PB  - Atlantis Press
SP  - 863
EP  - 869
SN  - 2352-5401
UR  - https://doi.org/10.2991/icamcs-16.2016.176
DO  - 10.2991/icamcs-16.2016.176
ID  - Liu2016/06
ER  -