Inexpensive HMC+DRAM Hybrid Main Memory Architecture with LRU-based Data Distribution Management

DOI

10.2991/icaita-16.2016.53How to use a DOI?

Keywords

HMC; DRAM; data distribution management

Abstract

The Hybrid Memory Cube (HMC) is a 3-D-stacked DRAM architecture whose I/O interface achieves up to 320 GB/s of external bandwidth. Therefore, the HMC is a promising alternative to DDRx memory due to its potential to achieve substantially improved memory bandwidth. However, the high price of a HMC device compromises cost efficiency when the device is lightly utilized. The cost of a HMC device with 2GB capacity is about 5 times of a DDRx memory with the same capacity. In this paper, we propose a new inexpensive HMC+DRAM hybrid main memory architecture to reduce the cost consumption. In order to manage such hybrid memories, we develop a LRU-based data distribution mechanism to determine the destination of particular data flow. Evaluations show that our scheme reduces the cost consumption of Main Memory by 48% on average with a negligible performance degradation compared to a current HMC-based system. Also, our architecture outperforms a current DRAM-based system by 1.5 times, and reduces the response delay by 1.2 times.

Copyright

© 2016, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Ying Zhou
AU  - Lin Zhang
AU  - Shuang Niu
AU  - Shulin Zhao
PY  - 2016/01
DA  - 2016/01
TI  - Inexpensive HMC+DRAM Hybrid Main Memory Architecture with LRU-based Data Distribution Management
BT  - Proceedings of the 2016 International Conference on Artificial Intelligence: Technologies and Applications
PB  - Atlantis Press
SP  - 214
EP  - 218
SN  - 1951-6851
UR  - https://doi.org/10.2991/icaita-16.2016.53
DO  - 10.2991/icaita-16.2016.53
ID  - Zhou2016/01
ER  -