Research on the Low Power and Low Voltage CMOS Integrated Circuit Design Patterns and Methodologies

DOI

10.2991/emcpe-16.2016.37How to use a DOI?

Keywords

Low Power, Low Voltage, CMOS, Integrated Circuit, Design Patterns, Methods.

Abstract

This paper presents the novel research on the low power and low voltage CMOS integrated circuit design patterns and general methodologies. With the integrated circuit technology to the rapid development of the deep sub-micron and nanometer order of magnitude, how to reduce the power consumption of the integrated circuit has become equally important problem with speed, area, power consumption constraints to further improve the performance of the chip, and increase the cost of the integrated circuit. A high level of integration and the application of high-speed device, especially in today's mobile devices and battery power equipment of the large-scale promotion, makes the power dissipation problem is becoming more and more prominent. Our research combines the literature list of reviews to propose the novel implementation paradigm for better performance.

Copyright

© 2016, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

Download article (PDF)

TY  - CONF
AU  - Zhen-bang Xu
AU  - Hong Shi
PY  - 2016/08
DA  - 2016/08
TI  - Research on the Low Power and Low Voltage CMOS Integrated Circuit Design Patterns and Methodologies
BT  - Proceedings of the 2016 5th International Conference on Environment, Materials, Chemistry and Power Electronics
PB  - Atlantis Press
SP  - 175
EP  - 178
SN  - 2352-5401
UR  - https://doi.org/10.2991/emcpe-16.2016.37
DO  - 10.2991/emcpe-16.2016.37
ID  - Xu2016/08
ER  -