A New Data Transfer Scheme for eMMC Connected Subsystems

DOI

10.2991/csss-14.2014.100How to use a DOI?

Keywords

eMMC; subsystem; ECSS; DDR, ASRHA; ASR, synchronization; Input Buffer; Output Buffer

Abstract

One of the issues in data transfer between host CPU and its eMMC connected subsystem is to determine when to send data from host to subsystem and when to receive data from subsystem to host with least CPU interference. The conventional approach to achieving data transfer synchronization is by polling, which impacts CPU bandwidth and potentially affects the subsystem’s performance. This paper proposes an automatic two-way data transfer synchronization scheme that requires no involvement of host CPU in data transfer synchronization and offers real-time synchronization performance on subsystem side.

Copyright

© 2014, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Deng Shulan
PY  - 2014/06
DA  - 2014/06
TI  - A New Data Transfer Scheme for eMMC Connected Subsystems
BT  - Proceedings of the 3rd International Conference on Computer Science and Service System
PB  - Atlantis Press
SP  - 424
EP  - 427
SN  - 1951-6851
UR  - https://doi.org/10.2991/csss-14.2014.100
DO  - 10.2991/csss-14.2014.100
ID  - Shulan2014/06
ER  -