A Novel Structure to Realize Memory Cell Fluctuation Under Voltage Control in Ising Chip

DOI

10.2991/cnct-16.2017.59How to use a DOI?

Keywords

Ising Chip, Indeterminate Computing, Memory Cell Fluctuation, Voltage Control.

Abstract

New computing architecture utilizing the noise of integrated circuit to realize indeterminate computing has been proposed previously to solve combinatorial optimization problems. But the solution accuracy of realizing indeterminate computing with circuit's noise performed significantly worse than that with external random number. Because large scale of time is spent to introduce randomness in reading memory cells by row, which reduces the effective computing time. This paper presents a novel structure to introduce probabilistic behavior with just one read operation. It improves the rate of effective computing time and can get close solution accuracy to the scheme using external random number but with less cost.

Copyright

© 2017, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Zhi WANG
AU  - Shu-ming CHEN
AU  - Jian ZHANG
PY  - 2016/12
DA  - 2016/12
TI  - A Novel Structure to Realize Memory Cell Fluctuation Under Voltage Control in Ising Chip
BT  - Proceedings of the International Conference on Computer Networks and Communication Technology (CNCT 2016)
PB  - Atlantis Press
SP  - 425
EP  - 431
SN  - 2352-538X
UR  - https://doi.org/10.2991/cnct-16.2017.59
DO  - 10.2991/cnct-16.2017.59
ID  - WANG2016/12
ER  -