Design and Implementation of the Scan Digital Display Based on FPGA

DOI

10.2991/cmfe-15.2015.196How to use a DOI?

Keywords

FPGA; EDA technology; VHDL; scan digital display.

Abstract

The scan digital display has the function of receiving and processing digital signals. As an advanced display type, the digital display presents a trend of accelerating development. Because of shortage of the long development cycle and high price of the traditional display design, this paper designs a scan display with six-bit Nixie tubes to achieve dynamic refresh display based on FPGA. This design adopts EDA technology, using VHDL as the hardware description language and Quartus II as the development platform to construct the scan digital display, which consists of the DATA module, multi-channel data selection module and BCD decoding module. Finally, the correctness and effectiveness of the digital display is validated by the compilation and simulation of the program downloaded from the programmable logic devices. This scan digital display has the characteristics of high speed, low power consumption and low cost which can be widely used in the market.

Copyright

© 2015, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Qing Fang Zhou
AU  - Jun Yang
PY  - 2015/07
DA  - 2015/07
TI  - Design and Implementation of the Scan Digital Display Based on FPGA
BT  - Proceedings of the International Conference on Chemical, Material and Food Engineering
PB  - Atlantis Press
SP  - 831
EP  - 834
SN  - 2352-5401
UR  - https://doi.org/10.2991/cmfe-15.2015.196
DO  - 10.2991/cmfe-15.2015.196
ID  - Zhou2015/07
ER  -