Proceedings of the 2nd International Symposium on Computer, Communication, Control and Automation

Modified Algorithm for Medium Length Irregular Low Density Parity Check Code with Low Computational Complexity and Error Floor Rate

Authors
D P Rathod, R N Awale, S V Bonde
Corresponding Author
D P Rathod
Available Online April 2013.
DOI
10.2991/3ca-13.2013.89How to use a DOI?
Keywords
Error correcting codes, an irregular LDPC codes, Tanner graph, short cycles, additive white Gaussian noise channel (AWGNC).
Abstract

Performance of medium length LDPC codes is directly proportional to error floor .In these codes, error floor can be mainly improved through elimination of short cycles. Hence, for effective elimination of short cycles, it is customary to use a girth conditioning in random construction process. Various accurate techniques, such as, density evolution and EXIT chart are developed for performance prediction of large block length, iteratively decoded LDPC codes. However, for medium block length, this method evolved with erroneous results. Even though, the medium block length LDPC codes have many application, short cycles degrades the performance and adds computational complexity in decoding process.

Copyright
© 2013, the Authors. Published by Atlantis Press.
Open Access
This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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Volume Title
Proceedings of the 2nd International Symposium on Computer, Communication, Control and Automation
Series
Advances in Intelligent Systems Research
Publication Date
April 2013
ISBN
978-90786-77-91-8
ISSN
1951-6851
DOI
10.2991/3ca-13.2013.89How to use a DOI?
Copyright
© 2013, the Authors. Published by Atlantis Press.
Open Access
This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

Cite this article

TY  - CONF
AU  - D P Rathod
AU  - R N Awale
AU  - S V Bonde
PY  - 2013/04
DA  - 2013/04
TI  - Modified Algorithm for Medium Length Irregular Low Density Parity Check Code with Low Computational Complexity and Error Floor Rate
BT  - Proceedings of the 2nd International Symposium on Computer, Communication, Control and Automation
PB  - Atlantis Press
SP  - 361
EP  - 364
SN  - 1951-6851
UR  - https://doi.org/10.2991/3ca-13.2013.89
DO  - 10.2991/3ca-13.2013.89
ID  - Rathod2013/04
ER  -